HC32F003_DDL_Rev1.0.2.zip
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所属分类:行业 > 嵌入式
文件大小:1.88 MB
上传日期:2022-07-17 19:36
MD5:3795028b56************281105ca22
资源说明:华大hc32f003 代码库,1.0.2版本。

[资源合计] 文件夹:362,文件:947

# 文件名称 大小 最后修改时间
1 HC32F003_DDL_Rev1.0.2\mcu\EWARM\HDSC_HC32F003.svd 399.07 KB 2018/9/14 8:36:46
2 HC32F003_DDL_Rev1.0.2\mcu\MDK\HDSC_HC32F003.SFR 255.13 KB 2018/9/14 8:39:26
3 HC32F003_DDL_Rev1.0.2\mcu\common\HC32F003.h 90.88 KB 2018/9/14 8:36:46
4 HC32F003_DDL_Rev1.0.2\example\adc\adc_cont_irq_sw\EWARM\adc_cont_irq_sw.ewd 87.23 KB 2018/11/28 15:54:12
5 HC32F003_DDL_Rev1.0.2\example\adc\adc_cont_polling_sw\EWARM\adc_cont_polling_sw.ewd 87.23 KB 2018/11/28 15:54:12
6 HC32F003_DDL_Rev1.0.2\example\adc\adc_norm_irq_sw\EWARM\adc_norm_irq_sw.ewd 87.23 KB 2018/11/28 15:54:12
7 HC32F003_DDL_Rev1.0.2\example\adc\adc_norm_polling_sw\EWARM\adc_norm_polling_sw.ewd 87.23 KB 2018/11/28 15:54:12
8 HC32F003_DDL_Rev1.0.2\example\adc\adc_scan_irq_sw\EWARM\adc_scan_irq_sw.ewd 87.23 KB 2018/11/28 15:54:12
9 HC32F003_DDL_Rev1.0.2\example\adc\adc_scan_polling_sw\EWARM\adc_scan_polling_sw.ewd 87.23 KB 2018/11/28 15:54:12
10 HC32F003_DDL_Rev1.0.2\example\adc\adc_tim2_scan_irq_sw\EWARM\adc_tim2_scan_irq_sw.ewd 87.23 KB 2018/11/28 15:54:13
11 HC32F003_DDL_Rev1.0.2\example\adt\AOSTrigger\EWARM\AOSTrigger.ewd 87.23 KB 2018/11/28 15:54:13
12 HC32F003_DDL_Rev1.0.2\example\adt\CaptureInputBuf\EWARM\CaptureInputBuf.ewd 87.23 KB 2018/11/28 15:54:13
13 HC32F003_DDL_Rev1.0.2\example\adt\CaptureInput\EWARM\CaptureInput.ewd 87.23 KB 2018/11/28 15:54:13
14 HC32F003_DDL_Rev1.0.2\example\adt\CompareOutputBuf\EWARM\CompareOutputBuf.ewd 87.23 KB 2018/11/28 15:54:13
15 HC32F003_DDL_Rev1.0.2\example\adt\CompareOutput\EWARM\CompareOutput.ewd 87.23 KB 2018/11/28 15:54:13
16 HC32F003_DDL_Rev1.0.2\example\adt\HWStartStopClrCapu\EWARM\HWStartStopClrCapu.ewd 87.23 KB 2018/11/28 15:54:13
17 HC32F003_DDL_Rev1.0.2\example\adt\Irq\EWARM\Irq.ewd 87.23 KB 2018/11/28 15:54:13
18 HC32F003_DDL_Rev1.0.2\example\adt\LpBreak\EWARM\LpBreak.ewd 87.23 KB 2018/11/28 15:54:13
19 HC32F003_DDL_Rev1.0.2\example\adt\PhaseCount\EWARM\PhaseCount.ewd 87.23 KB 2018/11/28 15:54:14
20 HC32F003_DDL_Rev1.0.2\example\adt\PortBreak\EWARM\PortBreak.ewd 87.23 KB 2018/11/28 15:54:14
21 HC32F003_DDL_Rev1.0.2\example\adt\PwmHwComp\EWARM\PwmHwComp.ewd 87.23 KB 2018/11/28 15:54:14
22 HC32F003_DDL_Rev1.0.2\example\adt\SameHSameLBreak\EWARM\SameHSameLBreak.ewd 87.23 KB 2018/11/28 15:54:14
23 HC32F003_DDL_Rev1.0.2\example\adt\SoftwareSync\EWARM\SoftwareSync.ewd 87.23 KB 2018/11/28 15:54:14
24 HC32F003_DDL_Rev1.0.2\example\adt\ValidPeriod\EWARM\ValidPeriod.ewd 87.23 KB 2018/11/28 15:54:14
25 HC32F003_DDL_Rev1.0.2\example\adt\VcBreak\EWARM\VcBreak.ewd 87.23 KB 2018/11/28 15:54:14
26 HC32F003_DDL_Rev1.0.2\example\bt\bt_cnt\EWARM\bt_cnt.ewd 87.23 KB 2018/11/28 15:54:14
27 HC32F003_DDL_Rev1.0.2\example\bt\bt_timer\EWARM\bt_timer.ewd 87.23 KB 2018/11/28 15:54:14
28 HC32F003_DDL_Rev1.0.2\example\bt\bt_tog\EWARM\bt_tog.ewd 87.23 KB 2018/11/28 15:54:14
29 HC32F003_DDL_Rev1.0.2\example\clk\clk_div\EWARM\clk_div.ewd 87.23 KB 2018/11/28 15:54:15
30 HC32F003_DDL_Rev1.0.2\example\clk\clk_switch\EWARM\clk_switch.ewd 87.23 KB 2018/11/28 15:54:15
31 HC32F003_DDL_Rev1.0.2\example\clk\clk_systick\EWARM\clk_systick.ewd 87.23 KB 2018/11/28 15:54:15
32 HC32F003_DDL_Rev1.0.2\example\gpio\gpio_inout\EWARM\gpio_inout.ewd 87.23 KB 2018/11/28 15:54:15
33 HC32F003_DDL_Rev1.0.2\example\gpio\gpio_irq\EWARM\gpio_irq.ewd 87.23 KB 2018/11/28 15:54:15
34 HC32F003_DDL_Rev1.0.2\example\i2c\i2c_int\EWARM\i2c_int.ewd 87.23 KB 2018/11/28 15:54:15
35 HC32F003_DDL_Rev1.0.2\example\i2c\i2c_master\EWARM\i2c_master.ewd 87.23 KB 2018/11/28 15:54:15
36 HC32F003_DDL_Rev1.0.2\example\i2c\i2c_slave\EWARM\i2c_slave.ewd 87.23 KB 2018/11/28 15:54:16
37 HC32F003_DDL_Rev1.0.2\example\lvd\lvd_detect_falling_irq\EWARM\lvd_detect_falling_irq.ewd 87.23 KB 2018/11/28 15:54:16
38 HC32F003_DDL_Rev1.0.2\example\lvd\lvd_detect_high_irq\EWARM\lvd_detect_high_irq.ewd 87.23 KB 2018/11/28 15:54:16
39 HC32F003_DDL_Rev1.0.2\example\lvd\lvd_detect_rising_irq\EWARM\lvd_detect_rising_irq.ewd 87.23 KB 2018/11/28 15:54:16
40 HC32F003_DDL_Rev1.0.2\example\pca\pca_cap\EWARM\pca_cap.ewd 87.23 KB 2018/11/28 15:54:16
41 HC32F003_DDL_Rev1.0.2\example\pca\pca_cmp_cnt\EWARM\pca_cmp_cnt.ewd 87.23 KB 2018/11/28 15:54:16
42 HC32F003_DDL_Rev1.0.2\example\pca\pca_pwm\EWARM\pca_pwm.ewd 87.23 KB 2018/11/28 15:54:16
43 HC32F003_DDL_Rev1.0.2\example\pca\pca_wdt\EWARM\pca_wdt.ewd 87.23 KB 2018/11/28 15:54:16
44 HC32F003_DDL_Rev1.0.2\example\spi\spi_int\EWARM\spi_int.ewd 87.23 KB 2018/11/28 15:54:16
45 HC32F003_DDL_Rev1.0.2\example\spi\spi_master\EWARM\spi_master.ewd 87.23 KB 2018/11/28 15:54:17
46 HC32F003_DDL_Rev1.0.2\example\spi\spi_slave\EWARM\spi_slave.ewd 87.23 KB 2018/11/28 15:54:17
47 HC32F003_DDL_Rev1.0.2\example\trim\trim_cal\EWARM\trim_cal.ewd 87.23 KB 2018/11/28 15:54:17
48 HC32F003_DDL_Rev1.0.2\example\trim\trim_mon\EWARM\trim_mon.ewd 87.23 KB 2018/11/28 15:54:17
49 HC32F003_DDL_Rev1.0.2\example\uart\uart_int\EWARM\uart_int.ewd 87.23 KB 2018/11/28 15:54:17
50 HC32F003_DDL_Rev1.0.2\example\uart\uart_master\EWARM\uart_master.ewd 87.23 KB 2018/11/28 15:54:17
51 HC32F003_DDL_Rev1.0.2\example\uart\uart_slave\EWARM\uart_slave.ewd 87.23 KB 2018/11/28 15:54:17
52 HC32F003_DDL_Rev1.0.2\example\vc\vc_detect_falling_irq\EWARM\vc_detect_falling_irq.ewd 87.23 KB 2018/11/28 15:54:17
53 HC32F003_DDL_Rev1.0.2\example\vc\vc_detect_high_irq\EWARM\vc_detect_high_irq.ewd 87.23 KB 2018/11/28 15:54:18
54 HC32F003_DDL_Rev1.0.2\example\vc\vc_detect_rising_irq\EWARM\vc_detect_rising_irq.ewd 87.23 KB 2018/11/28 15:54:18
55 HC32F003_DDL_Rev1.0.2\example\crc\EWARM\crc.ewd 87.23 KB 2018/11/28 15:54:15
56 HC32F003_DDL_Rev1.0.2\example\flash\EWARM\flash.ewd 87.23 KB 2018/11/28 15:54:15
57 HC32F003_DDL_Rev1.0.2\example\reset\EWARM\reset.ewd 87.23 KB 2018/11/28 15:54:16
58 HC32F003_DDL_Rev1.0.2\example\template\EWARM\template.ewd 87.23 KB 2018/11/28 15:54:17
59 HC32F003_DDL_Rev1.0.2\example\wdt\EWARM\wdt.ewd 87.23 KB 2018/11/28 15:54:18
60 HC32F003_DDL_Rev1.0.2\example\uart\uart_int\EWARM\uart_int.ewp 57.42 KB 2018/11/28 15:54:17
61 HC32F003_DDL_Rev1.0.2\example\vc\vc_detect_falling_irq\EWARM\vc_detect_falling_irq.ewp 57.39 KB 2018/11/28 15:54:17
62 HC32F003_DDL_Rev1.0.2\example\adc\adc_tim2_scan_irq_sw\EWARM\adc_tim2_scan_irq_sw.ewp 57.38 KB 2018/11/28 15:54:13
63 HC32F003_DDL_Rev1.0.2\example\adt\ValidPeriod\EWARM\ValidPeriod.ewp 57.35 KB 2018/11/28 15:54:14
64 HC32F003_DDL_Rev1.0.2\example\pca\pca_cmp_cnt\EWARM\pca_cmp_cnt.ewp 57.35 KB 2018/11/28 15:54:16
65 HC32F003_DDL_Rev1.0.2\example\uart\uart_master\EWARM\uart_master.ewp 57.35 KB 2018/11/28 15:54:17
66 HC32F003_DDL_Rev1.0.2\example\uart\uart_slave\EWARM\uart_slave.ewp 57.34 KB 2018/11/28 15:54:17
67 HC32F003_DDL_Rev1.0.2\example\adt\AOSTrigger\EWARM\AOSTrigger.ewp 57.34 KB 2018/11/28 15:54:13
68 HC32F003_DDL_Rev1.0.2\example\i2c\i2c_slave\EWARM\i2c_slave.ewp 57.34 KB 2018/11/28 15:54:16
69 HC32F003_DDL_Rev1.0.2\example\bt\bt_timer\EWARM\bt_timer.ewp 57.33 KB 2018/11/28 15:54:14
70 HC32F003_DDL_Rev1.0.2\example\adt\LpBreak\EWARM\LpBreak.ewp 57.33 KB 2018/11/28 15:54:13
71 HC32F003_DDL_Rev1.0.2\example\pca\pca_cap\EWARM\pca_cap.ewp 57.33 KB 2018/11/28 15:54:16
72 HC32F003_DDL_Rev1.0.2\example\pca\pca_pwm\EWARM\pca_pwm.ewp 57.33 KB 2018/11/28 15:54:16
73 HC32F003_DDL_Rev1.0.2\example\pca\pca_wdt\EWARM\pca_wdt.ewp 57.33 KB 2018/11/28 15:54:16
74 HC32F003_DDL_Rev1.0.2\example\adt\VcBreak\EWARM\VcBreak.ewp 57.33 KB 2018/11/28 15:54:14
75 HC32F003_DDL_Rev1.0.2\example\bt\bt_cnt\EWARM\bt_cnt.ewp 57.33 KB 2018/11/28 15:54:14
76 HC32F003_DDL_Rev1.0.2\example\bt\bt_tog\EWARM\bt_tog.ewp 57.33 KB 2018/11/28 15:54:14
77 HC32F003_DDL_Rev1.0.2\example\lvd\lvd_detect_falling_irq\EWARM\lvd_detect_falling_irq.ewp 57.31 KB 2018/11/28 15:54:16
78 HC32F003_DDL_Rev1.0.2\example\lvd\lvd_detect_rising_irq\EWARM\lvd_detect_rising_irq.ewp 57.31 KB 2018/11/28 15:54:16
79 HC32F003_DDL_Rev1.0.2\example\vc\vc_detect_rising_irq\EWARM\vc_detect_rising_irq.ewp 57.3 KB 2018/11/28 15:54:18
80 HC32F003_DDL_Rev1.0.2\example\adc\adc_cont_polling_sw\EWARM\adc_cont_polling_sw.ewp 57.3 KB 2018/11/28 15:54:12
81 HC32F003_DDL_Rev1.0.2\example\adc\adc_norm_polling_sw\EWARM\adc_norm_polling_sw.ewp 57.3 KB 2018/11/28 15:54:12
82 HC32F003_DDL_Rev1.0.2\example\adc\adc_scan_polling_sw\EWARM\adc_scan_polling_sw.ewp 57.3 KB 2018/11/28 15:54:12
83 HC32F003_DDL_Rev1.0.2\example\lvd\lvd_detect_high_irq\EWARM\lvd_detect_high_irq.ewp 57.3 KB 2018/11/28 15:54:16
84 HC32F003_DDL_Rev1.0.2\example\adt\HWStartStopClrCapu\EWARM\HWStartStopClrCapu.ewp 57.3 KB 2018/11/28 15:54:13
85 HC32F003_DDL_Rev1.0.2\example\vc\vc_detect_high_irq\EWARM\vc_detect_high_irq.ewp 57.29 KB 2018/11/28 15:54:18
86 HC32F003_DDL_Rev1.0.2\example\adt\CompareOutputBuf\EWARM\CompareOutputBuf.ewp 57.29 KB 2018/11/28 15:54:13
87 HC32F003_DDL_Rev1.0.2\example\adc\adc_cont_irq_sw\EWARM\adc_cont_irq_sw.ewp 57.28 KB 2018/11/28 15:54:12
88 HC32F003_DDL_Rev1.0.2\example\adc\adc_norm_irq_sw\EWARM\adc_norm_irq_sw.ewp 57.28 KB 2018/11/28 15:54:12
89 HC32F003_DDL_Rev1.0.2\example\adc\adc_scan_irq_sw\EWARM\adc_scan_irq_sw.ewp 57.28 KB 2018/11/28 15:54:12
90 HC32F003_DDL_Rev1.0.2\example\adt\CaptureInputBuf\EWARM\CaptureInputBuf.ewp 57.28 KB 2018/11/28 15:54:13
91 HC32F003_DDL_Rev1.0.2\example\adt\SameHSameLBreak\EWARM\SameHSameLBreak.ewp 57.28 KB 2018/11/28 15:54:14
92 HC32F003_DDL_Rev1.0.2\example\adt\CompareOutput\EWARM\CompareOutput.ewp 57.28 KB 2018/11/28 15:54:13
93 HC32F003_DDL_Rev1.0.2\example\wdt\EWARM\wdt.ewp 57.28 KB 2018/11/28 15:54:18
94 HC32F003_DDL_Rev1.0.2\example\adt\CaptureInput\EWARM\CaptureInput.ewp 57.27 KB 2018/11/28 15:54:13
95 HC32F003_DDL_Rev1.0.2\example\adt\PhaseCount\EWARM\PhaseCount.ewp 57.26 KB 2018/11/28 15:54:14
96 HC32F003_DDL_Rev1.0.2\example\i2c\i2c_master\EWARM\i2c_master.ewp 57.26 KB 2018/11/28 15:54:15
97 HC32F003_DDL_Rev1.0.2\example\spi\spi_master\EWARM\spi_master.ewp 57.26 KB 2018/11/28 15:54:17
98 HC32F003_DDL_Rev1.0.2\example\adt\PortBreak\EWARM\PortBreak.ewp 57.26 KB 2018/11/28 15:54:14
99 HC32F003_DDL_Rev1.0.2\example\adt\PwmHwComp\EWARM\PwmHwComp.ewp 57.26 KB 2018/11/28 15:54:14
100 HC32F003_DDL_Rev1.0.2\example\spi\spi_slave\EWARM\spi_slave.ewp 57.26 KB 2018/11/28 15:54:17
101 HC32F003_DDL_Rev1.0.2\example\trim\trim_cal\EWARM\trim_cal.ewp 57.26 KB 2018/11/28 15:54:17
102 HC32F003_DDL_Rev1.0.2\example\trim\trim_mon\EWARM\trim_mon.ewp 57.26 KB 2018/11/28 15:54:17
103 HC32F003_DDL_Rev1.0.2\example\i2c\i2c_int\EWARM\i2c_int.ewp 57.25 KB 2018/11/28 15:54:15
104 HC32F003_DDL_Rev1.0.2\example\spi\spi_int\EWARM\spi_int.ewp 57.25 KB 2018/11/28 15:54:16
105 HC32F003_DDL_Rev1.0.2\example\adt\Irq\EWARM\Irq.ewp 57.24 KB 2018/11/28 15:54:13
106 HC32F003_DDL_Rev1.0.2\example\reset\EWARM\reset.ewp 57.21 KB 2018/11/28 15:54:16
107 HC32F003_DDL_Rev1.0.2\example\adt\SoftwareSync\EWARM\SoftwareSync.ewp 57.19 KB 2018/11/28 15:54:14
108 HC32F003_DDL_Rev1.0.2\example\clk\clk_systick\EWARM\clk_systick.ewp 57.19 KB 2018/11/28 15:54:15
109 HC32F003_DDL_Rev1.0.2\example\clk\clk_switch\EWARM\clk_switch.ewp 57.19 KB 2018/11/28 15:54:15
110 HC32F003_DDL_Rev1.0.2\example\gpio\gpio_inout\EWARM\gpio_inout.ewp 57.19 KB 2018/11/28 15:54:15
111 HC32F003_DDL_Rev1.0.2\example\gpio\gpio_irq\EWARM\gpio_irq.ewp 57.18 KB 2018/11/28 15:54:15
112 HC32F003_DDL_Rev1.0.2\example\clk\clk_div\EWARM\clk_div.ewp 57.17 KB 2018/11/28 15:54:15
113 HC32F003_DDL_Rev1.0.2\example\template\EWARM\template.ewp 57.14 KB 2018/11/28 15:54:17
114 HC32F003_DDL_Rev1.0.2\example\flash\EWARM\flash.ewp 57.13 KB 2018/11/28 15:54:15
115 HC32F003_DDL_Rev1.0.2\example\crc\EWARM\crc.ewp 57.12 KB 2018/11/28 15:54:15
116 HC32F003_DDL_Rev1.0.2\driver\src\adt.c 50.94 KB 2018/9/13 17:04:33
117 HC32F003_DDL_Rev1.0.2\driver\inc\gpio.h 46.39 KB 2018/9/13 18:35:13
118 HC32F003_DDL_Rev1.0.2\driver\inc\adt.h 35.42 KB 2018/8/5 13:58:20
119 HC32F003_DDL_Rev1.0.2\driver\src\clk.c 24.34 KB 2018/11/26 13:52:25
120 HC32F003_DDL_Rev1.0.2\driver\src\pca.c 23.59 KB 2017/11/10 13:22:01
121 HC32F003_DDL_Rev1.0.2\driver\src\uart.c 23.42 KB 2018/10/29 15:08:18
122 HC32F003_DDL_Rev1.0.2\mcu\EWARM\config\flashloader\FlashHC32F003.out 20.67 KB 2018/2/7 15:55:00
123 HC32F003_DDL_Rev1.0.2\driver\src\vc.c 18.73 KB 2017/12/8 13:46:38
124 HC32F003_DDL_Rev1.0.2\driver\src\gpio.c 18.07 KB 2018/2/1 18:31:48
125 HC32F003_DDL_Rev1.0.2\example\uart\uart_int\MDK\uart_int.uvprojx 17.79 KB 2018/11/28 15:54:17
126 HC32F003_DDL_Rev1.0.2\driver\src\adc.c 17.74 KB 2018/1/29 11:22:08
127 HC32F003_DDL_Rev1.0.2\example\vc\vc_detect_falling_irq\MDK\vc_detect_falling_irq.uvprojx 17.72 KB 2018/11/28 15:54:17
128 HC32F003_DDL_Rev1.0.2\example\adc\adc_tim2_scan_irq_sw\MDK\adc_tim2_scan_irq_sw.uvprojx 17.72 KB 2018/11/28 15:54:13
129 HC32F003_DDL_Rev1.0.2\example\adt\ValidPeriod\MDK\ValidPeriod.uvprojx 17.69 KB 2018/11/28 15:54:14
130 HC32F003_DDL_Rev1.0.2\example\pca\pca_cmp_cnt\MDK\pca_cmp_cnt.uvprojx 17.69 KB 2018/11/28 15:54:16
131 HC32F003_DDL_Rev1.0.2\example\uart\uart_master\MDK\uart_master.uvprojx 17.69 KB 2018/11/28 15:54:17
132 HC32F003_DDL_Rev1.0.2\example\uart\uart_slave\MDK\uart_slave.uvprojx 17.68 KB 2018/11/28 15:54:17
133 HC32F003_DDL_Rev1.0.2\example\adt\AOSTrigger\MDK\AOSTrigger.uvprojx 17.68 KB 2018/11/28 15:54:13
134 HC32F003_DDL_Rev1.0.2\example\i2c\i2c_slave\MDK\i2c_slave.uvprojx 17.68 KB 2018/11/28 15:54:16
135 HC32F003_DDL_Rev1.0.2\example\bt\bt_timer\MDK\bt_timer.uvprojx 17.67 KB 2018/11/28 15:54:14
136 HC32F003_DDL_Rev1.0.2\example\adt\LpBreak\MDK\LpBreak.uvprojx 17.67 KB 2018/11/28 15:54:13
137 HC32F003_DDL_Rev1.0.2\example\pca\pca_cap\MDK\pca_cap.uvprojx 17.67 KB 2018/11/28 15:54:16
138 HC32F003_DDL_Rev1.0.2\example\pca\pca_pwm\MDK\pca_pwm.uvprojx 17.67 KB 2018/11/28 15:54:16
139 HC32F003_DDL_Rev1.0.2\example\pca\pca_wdt\MDK\pca_wdt.uvprojx 17.67 KB 2018/11/28 15:54:16
140 HC32F003_DDL_Rev1.0.2\example\adt\VcBreak\MDK\VcBreak.uvprojx 17.67 KB 2018/11/28 15:54:14
141 HC32F003_DDL_Rev1.0.2\example\bt\bt_cnt\MDK\bt_cnt.uvprojx 17.67 KB 2018/11/28 15:54:14
142 HC32F003_DDL_Rev1.0.2\example\bt\bt_tog\MDK\bt_tog.uvprojx 17.67 KB 2018/11/28 15:54:15
143 HC32F003_DDL_Rev1.0.2\example\wdt\MDK\wdt.uvprojx 17.63 KB 2018/11/28 15:54:18
144 HC32F003_DDL_Rev1.0.2\example\lvd\lvd_detect_falling_irq\MDK\lvd_detect_falling_irq.uvprojx 17.62 KB 2018/11/28 15:54:16
145 HC32F003_DDL_Rev1.0.2\example\lvd\lvd_detect_rising_irq\MDK\lvd_detect_rising_irq.uvprojx 17.61 KB 2018/11/28 15:54:16
146 HC32F003_DDL_Rev1.0.2\driver\src\flash.c 17.61 KB 2018/2/2 14:25:26
147 HC32F003_DDL_Rev1.0.2\example\vc\vc_detect_rising_irq\MDK\vc_detect_rising_irq.uvprojx 17.61 KB 2018/11/28 15:54:18
148 HC32F003_DDL_Rev1.0.2\example\adc\adc_cont_polling_sw\MDK\adc_cont_polling_sw.uvprojx 17.6 KB 2018/11/28 15:54:12
149 HC32F003_DDL_Rev1.0.2\example\adc\adc_norm_polling_sw\MDK\adc_norm_polling_sw.uvprojx 17.6 KB 2018/11/28 15:54:12
150 HC32F003_DDL_Rev1.0.2\example\adc\adc_scan_polling_sw\MDK\adc_scan_polling_sw.uvprojx 17.6 KB 2018/11/28 15:54:13
151 HC32F003_DDL_Rev1.0.2\example\lvd\lvd_detect_high_irq\MDK\lvd_detect_high_irq.uvprojx 17.6 KB 2018/11/28 15:54:16
152 HC32F003_DDL_Rev1.0.2\example\adt\HWStartStopClrCapu\MDK\HWStartStopClrCapu.uvprojx 17.6 KB 2018/11/28 15:54:13
153 HC32F003_DDL_Rev1.0.2\example\vc\vc_detect_high_irq\MDK\vc_detect_high_irq.uvprojx 17.6 KB 2018/11/28 15:54:18
154 HC32F003_DDL_Rev1.0.2\example\adt\CompareOutputBuf\MDK\CompareOutputBuf.uvprojx 17.59 KB 2018/11/28 15:54:13
155 HC32F003_DDL_Rev1.0.2\example\adc\adc_cont_irq_sw\MDK\adc_cont_irq_sw.uvprojx 17.59 KB 2018/11/28 15:54:12
156 HC32F003_DDL_Rev1.0.2\example\adc\adc_norm_irq_sw\MDK\adc_norm_irq_sw.uvprojx 17.59 KB 2018/11/28 15:54:12
157 HC32F003_DDL_Rev1.0.2\example\adc\adc_scan_irq_sw\MDK\adc_scan_irq_sw.uvprojx 17.59 KB 2018/11/28 15:54:12
158 HC32F003_DDL_Rev1.0.2\example\adt\CaptureInputBuf\MDK\CaptureInputBuf.uvprojx 17.59 KB 2018/11/28 15:54:13
159 HC32F003_DDL_Rev1.0.2\example\adt\SameHSameLBreak\MDK\SameHSameLBreak.uvprojx 17.59 KB 2018/11/28 15:54:14
160 HC32F003_DDL_Rev1.0.2\example\adt\CompareOutput\MDK\CompareOutput.uvprojx 17.58 KB 2018/11/28 15:54:13
161 HC32F003_DDL_Rev1.0.2\example\adt\CaptureInput\MDK\CaptureInput.uvprojx 17.58 KB 2018/11/28 15:54:13
162 HC32F003_DDL_Rev1.0.2\example\adt\PhaseCount\MDK\PhaseCount.uvprojx 17.57 KB 2018/11/28 15:54:14
163 HC32F003_DDL_Rev1.0.2\example\i2c\i2c_master\MDK\i2c_master.uvprojx 17.57 KB 2018/11/28 15:54:15
164 HC32F003_DDL_Rev1.0.2\example\spi\spi_master\MDK\spi_master.uvprojx 17.57 KB 2018/11/28 15:54:17
165 HC32F003_DDL_Rev1.0.2\example\adt\PortBreak\MDK\PortBreak.uvprojx 17.57 KB 2018/11/28 15:54:14
166 HC32F003_DDL_Rev1.0.2\example\adt\PwmHwComp\MDK\PwmHwComp.uvprojx 17.57 KB 2018/11/28 15:54:14
167 HC32F003_DDL_Rev1.0.2\example\spi\spi_slave\MDK\spi_slave.uvprojx 17.57 KB 2018/11/28 15:54:17
168 HC32F003_DDL_Rev1.0.2\example\trim\trim_cal\MDK\trim_cal.uvprojx 17.56 KB 2018/11/28 15:54:17
169 HC32F003_DDL_Rev1.0.2\example\trim\trim_mon\MDK\trim_mon.uvprojx 17.56 KB 2018/11/28 15:54:17
170 HC32F003_DDL_Rev1.0.2\example\i2c\i2c_int\MDK\i2c_int.uvprojx 17.56 KB 2018/11/28 15:54:15
171 HC32F003_DDL_Rev1.0.2\example\spi\spi_int\MDK\spi_int.uvprojx 17.56 KB 2018/11/28 15:54:17
172 HC32F003_DDL_Rev1.0.2\example\adt\Irq\MDK\Irq.uvprojx 17.54 KB 2018/11/28 15:54:13
173 HC32F003_DDL_Rev1.0.2\example\reset\MDK\reset.uvprojx 17.53 KB 2018/11/28 15:54:16
174 HC32F003_DDL_Rev1.0.2\example\adt\SoftwareSync\MDK\SoftwareSync.uvprojx 17.46 KB 2018/11/28 15:54:14
175 HC32F003_DDL_Rev1.0.2\example\clk\clk_systick\MDK\clk_systick.uvprojx 17.46 KB 2018/11/28 15:54:15
176 HC32F003_DDL_Rev1.0.2\example\clk\clk_switch\MDK\clk_switch.uvprojx 17.46 KB 2018/11/28 15:54:15
177 HC32F003_DDL_Rev1.0.2\example\gpio\gpio_inout\MDK\gpio_inout.uvprojx 17.46 KB 2018/11/28 15:54:15
178 HC32F003_DDL_Rev1.0.2\example\gpio\gpio_irq\MDK\gpio_irq.uvprojx 17.45 KB 2018/11/28 15:54:15
179 HC32F003_DDL_Rev1.0.2\example\clk\clk_div\MDK\clk_div.uvprojx 17.44 KB 2018/11/28 15:54:15
180 HC32F003_DDL_Rev1.0.2\example\template\MDK\template.uvprojx 17.42 KB 2018/11/28 15:54:17
181 HC32F003_DDL_Rev1.0.2\example\flash\MDK\flash.uvprojx 17.42 KB 2018/11/28 15:54:15
182 HC32F003_DDL_Rev1.0.2\example\crc\MDK\crc.uvprojx 17.4 KB 2018/11/28 15:54:15
183 HC32F003_DDL_Rev1.0.2\driver\src\bt.c 17.02 KB 2017/11/10 13:22:01
184 HC32F003_DDL_Rev1.0.2\mcu\MDK\config\Flash_HC32F003.FLM 16.56 KB 2018/2/1 14:45:24
185 HC32F003_DDL_Rev1.0.2\driver\inc\adc.h 15.64 KB 2018/2/1 18:12:29
186 HC32F003_DDL_Rev1.0.2\driver\src\i2c.c 14.81 KB 2018/10/29 14:24:28
187 HC32F003_DDL_Rev1.0.2\example\adt\SoftwareSync\source\main.c 14.06 KB 2018/9/14 11:20:46
188 HC32F003_DDL_Rev1.0.2\example\adt\Irq\source\main.c 12.99 KB 2018/9/14 11:19:51
189 HC32F003_DDL_Rev1.0.2\driver\inc\vc.h 12.35 KB 2018/2/1 18:12:29
190 HC32F003_DDL_Rev1.0.2\driver\inc\clk.h 11.82 KB 2018/10/26 11:55:13
191 HC32F003_DDL_Rev1.0.2\example\adc\adc_cont_irq_sw\EWARM\startup_hc32f003.s 11.55 KB 2018/11/28 15:54:12
192 HC32F003_DDL_Rev1.0.2\example\adc\adc_cont_polling_sw\EWARM\startup_hc32f003.s 11.55 KB 2018/11/28 15:54:12
193 HC32F003_DDL_Rev1.0.2\example\adc\adc_norm_irq_sw\EWARM\startup_hc32f003.s 11.55 KB 2018/11/28 15:54:12
194 HC32F003_DDL_Rev1.0.2\example\adc\adc_norm_polling_sw\EWARM\startup_hc32f003.s 11.55 KB 2018/11/28 15:54:12
195 HC32F003_DDL_Rev1.0.2\example\adc\adc_scan_irq_sw\EWARM\startup_hc32f003.s 11.55 KB 2018/11/28 15:54:12
196 HC32F003_DDL_Rev1.0.2\example\adc\adc_scan_polling_sw\EWARM\startup_hc32f003.s 11.55 KB 2018/11/28 15:54:12
197 HC32F003_DDL_Rev1.0.2\example\adc\adc_tim2_scan_irq_sw\EWARM\startup_hc32f003.s 11.55 KB 2018/11/28 15:54:13
198 HC32F003_DDL_Rev1.0.2\example\adt\AOSTrigger\EWARM\startup_hc32f003.s 11.55 KB 2018/11/28 15:54:13
199 HC32F003_DDL_Rev1.0.2\example\adt\CaptureInputBuf\EWARM\startup_hc32f003.s 11.55 KB 2018/11/28 15:54:13
200 HC32F003_DDL_Rev1.0.2\example\adt\CaptureInput\EWARM\startup_hc32f003.s 11.55 KB 2018/11/28 15:54:13

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